Parity Generators and Checkers
Devices in the parity generator and checker logic family are component-level devices used to evaluate the number of bits in a digital word that are set to 1, and generate (or evaluate) an additional parity bit which indicates whether the number of bits in the word set to 1 is even or odd. This function is commonly used as a simple means of detecting data errors that may have been introduced during transmission.
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onsemi
COM8136-6P532
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$0.3721
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SY100E160JZIn Stock
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Microchip Technology
74F401PCIn Stock
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onsemi
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Nexperia USA Inc.
N74F280BD,602In Stock
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NXP USA Inc.
CY74FCT480BTSOCIn Stock
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Texas Instruments
74ACT280MTRIn Stock
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STMicroelectronics
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